Hangs after "Loading" but before "Uncompressing"
Richard B. Johnson
root en chaos.analogic.com
Jue Ene 27 00:45:49 CST 2000
On Thu, 27 Jan 2000, Alan Modra wrote:
>
> On Wed, 26 Jan 2000, Richard B. Johnson wrote:
>
> > On Wed, 26 Jan 2000, Markley, Todd wrote:
> >
> > > Dick:
> > > I think you are asking me to comment out the `je a20_wait`
> > > line in setup.S. I have now tried this and get the same results.
> > > The problem system still hangs just before "Uncompressing" and
> > > the same kernel boots fine on my laptop.
> > >
> > Yes. So we know that it's not hung waiting for the alias to disappear.
>
> Actually, when I squint at this bit of code, it look to me like the
> problem isn't a potential hang. Rather, it might be possible to exit that
> loop too quickly. ie. continue on the boot with A20 still disabled.
>
> Here's the code
> a20_wait:
> incw %ax # unused memory location <0xfff0
> movw %ax, %fs:(0x200) # we use the "int 0x80" vector
> cmpw %gs:(0x210), %ax # and its corresponding HMA addr
> je a20_wait # loop until no longer aliased
>
> Imagine if %gs:(0x210) happened to be in the cache, and not equal to the
> first value of %ax stored - We'd exit the loop immediately. I dunno
> whether all PC hardware handles these memory aliasing situations properly.
> If not, then we'd exit the loop the second time around if we didn't the
> first time.
>
It's worse than that. The L2 cache-controller 'knows' where a write
occurred. It also 'knows' where a read occurred. It does not 'know'
that a bit is missing in the decode because there are no bits missing
in the L2 cache. It may not even read the aliased location a second
time. It's already in the cache.
The 'slow' address-bit20 enable happens on some machines because it's
handled by the keyboard controller which is a uP that takes time to do
things. If the machine is not broken, all you have to do is wait some
time.
The bus clock is still going to timer-channel zero even though its
interrupts have been turned off. You can spin on the hardware count,
waiting to it to change at least 120 times (don't care about the
actual value). This will guarantee the 1 ms necessary for the
a20 bit to be enabled. Since all IBM/Intel machines have that
timer, it's already enabled, and it all runs off the same clock,
it will work on any machine of any speed. Note that we don't
care if the divisor has been set. The BIOS divisor was 0 (65536)
which would have generated an interrupt at 18.206 times per second.
This same mechanism can be used for small timeouts in kernel
drivers. In other words, we don't really need 'BogoMIPS'. You
can spin on the hardware rather than a register-count.
Cheers,
Dick Johnson
Penguin : Linux version 2.3.39 on an i686 machine (800.63 BogoMips).
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