Udelay and new CPUs

[Jeremy Fitzhardinge]

On 21-Jan-00 H. Peter Anvin wrote:
> Jeremy Fitzhardinge wrote:
>> 
>> On 21-Jan-00 H. Peter Anvin wrote:
>> > There are no "x86 cycles" on Crusoe, so it counts VLIW cycles.  In
>> > fact, on TM5400 it counts *nominal* cycles, since the actual cycle
>> > length is variable (due to LongRun).
>> 
>> So RDTSC is useless for getting consistent udelay delays.
>> 
> 
> No, on the contrary.  For a 700 MHz TM5400 the TSC will always count at
> 700 MHz even if the CPU decides that it currently only needs to run at,
> say, 175 MHz.

Apparently if you *emphasize* words, they become invisible to my eyes. 
Sigh, maybe I should start reading with my lips moving...

        J

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