Udelay and new CPUs

[Rogier Wolff]

Jeremy Fitzhardinge wrote:
> 
> On 20-Jan-00 Alan Cox wrote:
> >> How does Linux on the TM3120 (and TM5400) cope with the variable speed
> >> in which the udelay loop is executed?
> > 
> > Im told the next gen intel CPU's  our udelay() wont work. I'm not under any
> > wonderous NDA's so I dont know why or what magic is planned, but an RDTSC
> > based udelay() has to get done anyway
 
> Do the Transmeta chips emulate a TSC which goes at a constant rate,
> even though they dynamically change core frequency?

Oh, that would be possible: If they have a PLL which can run at say
15/16 , they can add 16/15 to the TSC every clock.

			Roger.

(*) they site 90% of top speed as requiring 90% core voltage, thus
only 71% of the power. So, something close to that resolution must be
possible. 

P.S. Does everybody realize that the "cool stuff" in Linus' interview

interviewer: What do you make at Transmeta?
Linus:       Stuff. 
interviewer: What kind of stuff?
Linus:       Cool stuff. 

was a clever pun that nobody "got" for half a year or longer?

-- 
** R.E.Wolff en BitWizard.nl ** http://www.BitWizard.nl/ ** +31-15-2137555 **
*-- BitWizard writes Linux device drivers for any device you may have! --*
 "I didn't say it was your fault. I said I was going to blame it on you."

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