[patch] smp-2.3.40-F2, x86 SMP fixes, IOAPIC on UP kernels

[Ingo Molnar]

the newest x86 SMP patchset against pre6-2.3.40 is at:

	http://www.redhat.com/~mingo/smp-2.3.40-F2

        138515 bytes, mdsum: 767e7837a08e9c9d7c429dd07b43a2f2

Changes in smp-2.3.40-F2:

 - ported C3 to 2.3.40-pre6 which already includes A3.

 - big cleanup of the x86 SMP code, separated things and now there are
   5 distinct files in arch/i386/kernel which deal with APIC and SMP
   details:

       smp.c:      'core' SMP architecture 
       mpparse.c:  MP configuration analyzing
       apic.c:     all things local APIC
       io_apic.c:  IO-APIC related functions
       smpboot.c:  strictly SMP-booting related functions
     
   similarly i've split up the include files as well. As a result the
   APIC, IOAPIC and SMP architecture is completely isolated and this
   enables the usage of IOAPICs on UP kernels:

        [ ] Symmetric multi-processing support                  
        [*] APIC and IO-APIC support on uniprocessors (NEW)   

   I've added this new option because most UP kernels do not want to have
   the extra IOAPIC code in them.

   /proc/interrupts on a UP kernel which is booted on an SMP box:

	           CPU0
	  0:      17842    IO-APIC-edge  timer
	  1:        127    IO-APIC-edge  keyboard
	  2:          0          XT-PIC  cascade
	  4:        244    IO-APIC-edge  serial
	 13:          1          XT-PIC  fpu
	 18:         30   IO-APIC-level  sym53c8xx
	 36:         77   IO-APIC-level  eth3
	 40:          5   IO-APIC-level  eth2
	 44:          5   IO-APIC-level  eth1
	 50:          5   IO-APIC-level  eth0
	 54:        158   IO-APIC-level  sym53c8xx
	 58:       1434   IO-APIC-level  sym53c8xx
	NMI:      17793
	ERR:          0

   the local APIC timer is used as a profiling interrupt which means more
   accurate and lightweight profiling. The NMI lockup-detector now
   works in UP kernels too. We can also use multiple IOAPICs in UP kernels
   too, APIC and IOAPIC support is now completely independent of x86 SMP
   support.

   NOTE: this does not yet enable i810 boxes to work in IOAPIC mode,
   unless the BIOS creates an MP-table. But it's easy now, just write a
   new kernel function to create a i810-specific mptable which lists the
   correct IOAPIC layout.

 - ... removed penguin counting :)

 - many smaller cleanups.

This patchset solves all known outstanding problems, if your SMP box still
fails to boot or is instable then please re-send the report to me, thanks.

-- mingo

Changes in smp-2.3.40-C3:

-  along Manfred's suggestion i changed all in-kernel page mappings to be
   _PAGE_GLOBAL on x86. If CPU is compiled for PPro or better then the
   runtime check can be optimized away. Otherwise the runtime check
   happens. This change speeds up access to vmalloc()-ed areas and
   prevents introducing yet another TLB flush callback.

 - Fixed a bug caused by the 2.3.20 SMP changes, LDR has to be based on
   logical ID, not physical APIC id. This should fix those dual PPro
   boxes.

 - changed the physical <=> logical mapping between CPUs and IDs to be
   1:1. This was enabled by the 2.3.20 changes. This speeds up sched.c and
   compresses data structures. Note: this also means that cpu_number_map[]
   is an inline function now. This change does not force other
   architectures to do a 1:1 mapping.

 - optimized TLB flushes a bit, we actually do not have to read %cr3 and
   %cr4 (which is a slow instruction), we can calculate all the data.

 - ... and silly penguin counting ;)


Changes in smp-2.3.30-A3:

 - fixes the global page flush bug noticed by Mark Giampapa @ IBM. I've
   added a new per-architecture flush_tlb_all_kernel() call, which also
   flushes 'special' kernel-mappings. flush_tlb_all() from now on should
   be regarded as flushing only user-space and normal kernel-space
   mappings. __flush_tlb() is noticeably faster than __flush_tlb_global(). 
   The two affected places, zap_low_mappings() and flush_all_zero_pkmaps()
   are now using the new flush_tlb_all_kernel() call. I've removed the
   extraneous invlpg in map_new_virtual(), which speeds up kmap(). I've
   tested this change and the previous instability is fixed. This could
   also fix some of the highmem swapping weirdness Christoph Rohland
   reported?

-  fixes the IOAPIC ID setting bug noticed by Matt Domsch @ Dell. This
   bugfix has the chance of solving a range of problems reported: the IRQ
   delivery assymetry on some boxes and it might even solve some of the
   boot problems certain boards have? The MP spec requires us to set the
   IO-APIC ID from the MP-table, we did this only for a small set of
   boards.

-  Mark Giampapa noticed another bug as well: we were mapping the IOAPIC
   and local APIC with caching enabled in the pagetable, and this is
   causing problems on some boards. The patch adds a new fixmap_nocache()
   call and the SMP code now maps both the IOAPIC(s) and the local APIC(s)
   with the PCD bit set. The MP spec requires us to map APICs with
   caching disabled, nasty bug indeed.



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